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Dr. Paramasivam C.

Asst. Professor, Electronics and Communication Engineering, School of Engineering, Bengaluru

Qualification: BE, M.E, Ph.D
c_paramasivam@blr.amrita.edu
Ph: +91 9994073577
Google Scholar Profile
Scopus Author ID
Research Interest: Analog VLSI Design, Implement DSP algorithm in Xilinx ZedBoard SOC, LTE Architecture Design for 5G Technology, Machine Learning, VLSI Architecture Design for Digital Signal Processing Application, Wireless Sensor Networks

Bio Publications Professional Appointments Research Major Research Interests Membership in Professional Bodies Awards Courses Taught Student Guidance
Bio

Dr. C. Paramasivam serves as Assistant Professor (Sr. Gr.) at the Department of Electronics and Communication Engineering, School of Engineering, Amrita Vishwa Vidyapeetham, Bengaluru. Prior to joining Amrita, he was working in the department of Electronics and Communication Engineering, K. S.Rangasamy College of Technology, Namakkal, Tamil Nadu for 12 years. He holds a Ph. D. degree in ‘High Performance VLSI Architecture Design for DSP Applications’ from Anna University, M. E. degree in VLSI Design from Anna University and B. E. degree in Electrical and Electronics from Bharathiar University. He has more than 40 publications in International Journals and Conferences. His area of research includes, FPGA based accelerator design for Deep Learning Algorithm, VLSI Architecture Design for Digital Signal Processing Application, Artificial Intelligence Application in Emotion Recognition and Hardware Security and Creation of New Fault Model in Testing. He has carried out a significant role as Chief Coordinator in Center for VLSI available in K.S. Rangasamy College of Technology, Coordinator for IETE, Mentor for NPTEL online course, Department Coordinator for workshop conducted through NMEICT project, IIT Kharagpur, etc. He has guided 15 PG projeccts and 19 UG Projects. He is a Life Member of Indian Society for Technical Education (ISTE), The Institution of Electronics and Telecommunication Engineers (IETE) and Indian Society of Systems for Science & Engineering (ISSE). He is a member of IEEE Circuit and System Society ( IEEE-CAS)

Education

  • 2018: Ph. D. 
    Anna University, Chennai
  • 2007: M. E. (VLSI Design)
    Anna University, Chennai
  • 2004: B. E. 
    Bharathiar University, Coimbatore
Publications

Journal Article

Year : 2022

A Real -Time Oral Cavity Gesture based Words Synthesizer using Sensors

Cite this Research Publication : Palli Padmini, C. Paramasivam, G. Jyothish Lal, Sadeen Alharbi, and Kaustav Bhowmick, A Real -Time Oral Cavity Gesture based Words Synthesizer using Sensors, Computers, Materials & Continua,2021. (SCIE Journal, IF: 3.772 Citescore: 4.6 Q1: 80 percentile).

Publisher : Computers, Materials & Continua,2021. (SCIE Journal, IF: 3.772 Citescore: 4.6 Q1: 80 percentile).

Year : 2022

Age-Based Automatic Voice Conversion Using Blood Relation for Voice Impaired

Cite this Research Publication : Palli Padmini, C. Paramasivam, G. Jyothish Lal, Sadeen Alharbi, and Kaustav Bhowmick, Age-Based Automatic Voice Conversion Using Blood Relation for Voice Impaired, Computers, Materials & Continua, Vol.70, No.2, 2022, pp.4027-4051 (SCIE Journal, IF: 3.772 Citescore: 4.6 Q1: 80 percentile)

Publisher : Computers, Materials & Continua, Vol.70, No.2, 2022, pp.4027-4051 (SCIE Journal, IF: 3.772 Citescore: 4.6 Q1: 80 percentile)

Year : 2020

Design and Implementation of Enhanced PUF Architecture on FPGA

Cite this Research Publication : K. Hatti and Paramasivam C., “Design and Implementation of Enhanced PUF Architecture on FPGA”, International Journal of Electronics Letters, pp. 1-14, 2020.

Publisher : International Journal of Electronics Letters

Year : 2020

Medical Applications of Deep Learning in Emotion Recognition System

Cite this Research Publication : Paramasivam C. and R, P. Darsini, “Medical Applications of Deep Learning in Emotion Recognition System”, Journal of Critical Reviews, vol. 7, no. 17, pp. 2784-2789, 2020.

Publisher : Journal of Critical Reviews

Year : 2020

A review on convolutional neural network based deep learning methods in gene expression data for disease diagnosis

Cite this Research Publication : C. Gunavathi, Sivasubramanian, K., Keerthika, P., and Paramasivam C., “A review on convolutional neural network based deep learning methods in gene expression data for disease diagnosis”, Materials Today: Proceedings, 2020.

Publisher : Materials Today: Proceedings (2020)

Year : 2018

FPGA Based Real Time Bluetooth Communication for Tele health, Household Security and Industry Safety

Cite this Research Publication : Paramasivam C., Aravindhan, E., R. priya, H., Hema, M., and A. singh, C., “FPGA Based Real Time Bluetooth Communication for Tele health, Household Security and Industry Safety”, Proceedings on International Conference on Modern Global Research in Engineering & Technology (ICMGRET), vol. Vol.1, p. Page 44, 2018.

Publisher : Proceedings on International Conference on Modern Global Research in Engineering Technology (ICMGRET)

Year : 2017

Voice Controlled Home Appliances Using Embedded System

Cite this Research Publication : Paramasivam C., .K, S., .K, S., .N, S., R, R., and Paramasivam, K. & C., “Voice Controlled Home Appliances Using Embedded System”, International Journal of Emerging Technology in Computer Science and Electronics, vol. 24, 05 vol., pp. pp. 28870-28875, 2017.

Publisher : International Journal of Emerging Technology in Computer Science and Electronics

Year : 2016

Parallel pipelined FFT architecture for real valued signals

Cite this Research Publication : V. Suganya and Paramasivam C., “Parallel pipelined FFT architecture for real valued signals”, Proceedings on IEEE International Conference on Wireless Communications, Signal Processing and Networking (WiSPNET), vol. 1. pp. 2201-2203, 2016.

Publisher : Proceedings on IEEE International Conference on Wireless Communications, Signal Processing and Networking (WiSPNET)

Year : 2015

Modified Scaling-Free CORDIC Based Pipelined Parallel MDC FFT and IFFT Architecture for Radix-22 Algorithm

Cite this Research Publication : Paramasivam C. and Jayanthi, K. B., “Modified Scaling-Free CORDIC Based Pipelined Parallel MDC FFT and IFFT Architecture for Radix-22 Algorithm”, World Academy of Science, Engineering and Technology, International Journal of Electrical, Computer, Energetic, Electronic and Communication Engineering, vol. vol.9, 12 vol., pp. pp. 1379-1385., 2015.

Publisher : World Academy of Science, Engineering and Technology, International Journal of Electrical, Computer, Energetic, Electronic and Communication Engineering

Year : 2015

CORDIC based Pipelined Parallel Architecturte for RFFT and RIFFT

Publisher : International journal of Applied Engineering Research

Year : 2013

Industrial Process Management Using LabVIEW

Cite this Research Publication : S. .Venkatlakshmi, .Venkatlakshmi, S., Revathi, S., Arul, E. M. S., and Paramasivam C., “Industrial Process Management Using LabVIEW”, IOSR Journal of Electronics and Communication Engineering, vol. 5, pp. 46-56, 2013.

Publisher : IOSR Journal of Electronics and Communication Engineering

Year : 2013

Energy Efficient FPGA based VLSI architecture for MPEG-2 Video Decoding

Cite this Research Publication : Paramasivam C. and C. Murugan, A., “Energy Efficient FPGA based VLSI architecture for MPEG-2 Video Decoding”, Proceedings on International conference on Futuristic Trends in Electronics Engineering (ICFTEE), vol. 1, pp. Pages 366-370, 2013.

Publisher : ICFTEE

Year : 2012

Energy Efficient FPGA Based VLSI Architecture for Mpeg-2 Audio/Video Decoding

Cite this Research Publication : A. C. Murugan and Paramasivam C., “Energy Efficient FPGA Based VLSI Architecture for Mpeg-2 Audio/Video Decoding”, CIIT International Journal of Programmable Device Circuits and Systems, vol. 4, 2 vol., 2012.

Publisher : CIIT International Journal of Programmable Device Circuits and Systems

Conference Paper

Year : 2020

Design of Low complexity &High performance LUT based Feed Forward FFT Architecture

Cite this Research Publication : Y. .Harshitha and Paramasivam C., “Design of Low complexity &High performance LUT based Feed Forward FFT Architecture”, in 2020 IEEE International Conference for Innovation in Technology (INOCON), Nagarjuna College of Engineering and Technology, Bangalore , 2020.

Publisher : Nagarjuna College of Engineering and Technology, Bangalore

Year : 2015

High throughput feed forward pipelined parallel architecture for FFT and IFFT

Cite this Research Publication : Paramasivam C., “High throughput feed forward pipelined parallel architecture for FFT and IFFT”, in 2015 International Conference on Innovations in Information, Embedded and Communication Systems (ICIIECS), Coimbatore, India, 2015.

Publisher : 2015 International Conference on Innovations in Information, Embedded and Communication Systems (ICIIECS)

Year : 2014

Area and time efficient hardwired pre -shifted bi-rotation CORDIC design

Cite this Research Publication : M. M and Paramasivam C., “Area and time efficient hardwired pre -shifted bi-rotation CORDIC design”, in International Conference on Communication and Signal Processing, ICCSP 2014 - Proceedings, 2014.

Publisher : International Conference on Communication and Signal Processing, ICCSP 2014 - Proceedings

Year : 2013

Low power and memory efficient FFT architecture using modified CORDIC algorithm

Cite this Research Publication : A. Malashri and Paramasivam C., “Low power and memory efficient FFT architecture using modified CORDIC algorithm”, in 2013 International Conference on Information Communication and Embedded Systems (ICICES), 2013.

Publisher : 2013 International Conference on Information Communication and Embedded Systems (ICICES)

Conference Proceedings

Year : 2022

Design of Low Switching Pattern Generator for BIST Architecture

Cite this Research Publication : Pandey, S.K., Paramasivam, C. (2022). “Design of Low Switching Pattern Generator for BIST Architecture “ Micro-Electronics and Telecommunication Engineering , Lecture Notes in Networks and Systems, vol 373. Springer, Singapore. https://doi.org/10.1007/978-981-16-8721-1_13

Publisher : Springer

Year : 2021

The MUX-Based PUF Architecture for Hardware Security

Cite this Research Publication : K. Hatti and C. Paramasivam, "The MUX-Based PUF Architecture for Hardware Security," 2021 International Conference on Circuits, Controls and Communications (CCUBE), 2021, pp. 1-7, doi: 10.1109/CCUBE53681.2021.9702737.

Publisher : IEEE

Year : 2018

FPGA based real time bluetooth communication for industrial safety monitoring

Publisher : Proceedings on International Conference on Modern Global Research in Engineering & Technology (ICMGRET)

Year : 2018

RFID based navigation system for unmanned material handling vehicle using FPGA

Cite this Research Publication : A. Meena, Anbarasan, K., Badhrinaathan, S. B., G. Ranjith, M., and Paramasivam C., “RFID based navigation system for unmanned material handling vehicle using FPGA”, Proceedings on International Conference on Modern Global Research in Engineering & Technology (ICMGRET). IEEE, Gujarat, India, 2018.

Publisher : Proceedings on International Conference on Modern Global Research in Engineering Technology (ICMGRET)

Year : 2017

IOT based smart surveillance of human health system

Cite this Research Publication : S. K, K, S., N, S., K, R., and Paramasivam C., “IOT based smart surveillance of human health system”, Proceedings on National conference on Recent advancement and effectual researches in electrical engineering , vol. 1. p. Page 6., 2017.

Publisher : Proceedings on National conference on Recent advancement and effectual researches in electrical engineering

Year : 2016

A low complexity and reconfigurable SDF-FFT processor for Wireless Applications

Cite this Research Publication : Paramasivam C. and Jones, M. M., “A low complexity and reconfigurable SDF-FFT processor for Wireless Applications”, Proceedings on 3rd IEEE International Conference on Innovations in Information Embedded and Communication Systems(ICIIECS), vol. 3. pp. 52-59, 2016.

Publisher : Proceedings on 3rd IEEE International Conference on Innovations in Information Embedded and Communication Systems(ICIIECS)

Year : 2016

An In-Place FFT and IFFT architecture for radix-22 algorithm using modified scaling free CORDIC

Publisher : Proceedings on IEEE sponsored 3rd International Conference on Electronics and Communication Systems

Year : 2015

Area and Time Efficient FFT Architecture Using Hardwired Pre-Shifted Bi-Rotation Cordic Design

Publisher : International Conference on Innovations in Engineering and Technology (ICIET)

Year : 2015

Implementation of CORDIC look ahead based VLSI architecture for Kaiser Bessel window techniques in spectral analysis

Publisher : International journal of Applied Engineering Research

Year : 2015

Modified Scaling –Free CORDIC based in place FFT and IFFT architecture for radix-22 algorithm

Publisher : Proceedings on International Conference on Innovations in computer science and Information Technology(ICICSIT)

Year : 2015

CORDIC Based Pipelined Parallel Architecture for RFFT and RIFFT

Publisher : Proceedings on International Conference on Advances in computing, control, communication, automation and structural engineering (ACCCAS-2015)

Year : 2015

Implementation of hyperbolic CORDIC-based VLSI architecture for Kaiser-Bessel window techniques in spectral analysis

Publisher : Proceedings on DRDO Sponsored 2nd IEEE International conference on Innovations in Information, Embedded and Communication Systems(ICIIECE’15)

Year : 2014

Modified Scaling-Free Micro-rotation based Circular CORDIC Algorithm using Taylor Series Expansion of Sine and Cosine

Publisher : Proceedings on IEEE International Conference on Innovations in Engineering and Technology (ICIET)

Year : 2014

Area and Time Efficient Hardwired Pre –Shifted Bi-Rotation CORDIC Design

Publisher : Proceedings on 3rd IEEE International Conference on Communication and Signal Processing

Year : 2014

Modifid Scaling-Free based Circular CORDIC algorithm using Taylor Series Expansion

Cite this Research Publication : Arunnehru S, Paramasivam C. "Modifid Scaling-Free based Circular CORDIC algorithm using Taylor Series Expansion", International conference on Innovations in Information, Embedded and Communication Systems, vol. 1. pp. 861-865, 2014

Publisher : International conference on Innovations in Information, Embedded and Communication Systems

Year : 2013

High performance and low power modified radix-25 FFT architecture for high rate WPAN application

Cite this Research Publication : B. Pushparaj and Paramasivam C., “High performance and low power modified radix-25 FFT architecture for high rate WPAN application”, Proceedings on IEEE International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT), vol. 1, pp. Pages 1-4, 2013.

Publisher : ICEVENT

Year : 2013

Energy Efficient VLSI architecture for MPEG-2 Video Decoding

Cite this Research Publication : A. C. Murugan and Paramasivam C., “Energy Efficient VLSI architecture for MPEG-2 Video Decoding”, Proceedings on International conference on Computing, Communication and Applications(ICCCA), vol. 1. p. Pages 100, 2013.

Publisher : Proceedings on International conference on Computing, Communication and Applications(ICCCA)

Year : 2011

Design of Low Power Coarse Grained Reconfigurable Architecture by Reusable Context Pipelining

Cite this Research Publication : Paramasivam C. and Punithavathi, A., “Design of Low Power Coarse Grained Reconfigurable Architecture by Reusable Context Pipelining”, Proceedings on Fourth National conference on Computer, Communication and networking engineering(NCCCN’11), vol. 1. p. Page 10, 2011.


Publisher : NCCCN’11'

Year : 2010

Low Power hardware architecture for VBSME using PIXEL truncation

Cite this Research Publication : Paramasivam C. and Ramkumar, N., “Low Power hardware architecture for VBSME using PIXEL truncation”, Proceedings on National conference on Recent advancements in engineering & technology, vol. 1. pp. Page 304-309, 2010.

Publisher : Proceedings on National conference on Recent advancements in engineering technology

Year : 2009

Minimization of area in DSP application based high speed arithmetic circuits

Publisher : Proceedings on Silver Jubilee conference on communication technologies and VLSI design

Year : 2009

An Improved auto scan design approach for sequential circuits

Publisher : Proceedings on National conference on Advanced Communication and Computing

Year : 2009

Area Minimization in DSP Application based High speed arithmetic circuits

Publisher : Proceedings on Second International conference on Signal and Image Processing (ICSIP)

Year : 2008

Reverberant speech enchancement using two stage algorithm

Publisher : Proceedings on Third National conference on recent trends in Electrical, Electronics, Instrumentation Communication Engineering

Year : 2007

Minimization of silicon area in high speed arithmetic circuits

Publisher : Proceedings on National conference on Modeling, Analysis Simulation of Computers and Telecommunication systems(MASCOT)

Year : 2007

Low power design of high speed arithmetic circuits

Publisher : Proceedings on Second National conference on Trends and development in VLSI and embedded systems

Magazine Article

Year : 2015

CORDIC Based Pipelined Parallel Architecture for RFFT and RIFFT

Publisher : Proceedings on International Conference on Advances in computing, control, communication, automation and structural engineering (ACCCAS-2015)

Professional Appointments
Year Affiliation
February-06, 2019 to Till Date Assistant Professor (Senior Grade), Amrita School of Engineering, Bangalore, Karnataka
June-01, 2010 to February-5, 2019 Assistant Professor, K.S.Rangasamy College of Technology, Tiruchengode, Namakkal, Tamil Nadu
May-30, 2007 to May-31, 2010 Lecturer, K.S.Rangasamy College of Technology, Tiruchengode, Namakkal, Tamil Nadu
July-01, 2004 to April-29, 2005 Lecturer, K.S.Rangasamy College of Technology, Tiruchengode, Namakkal, Tamil Nadu
Research

Research & Management Experience

  • Teaching Experience: 14 Years
  • Research Experience: 2 Years
Major Research Interests
  • FPGA based accelerator design for Deep Learning Algorithm
  • Artificial Intelligence Application in Emotion Recognition and Hardware Security
  • VLSI Architecture Design for Digital Signal Processing Application
  • Creation of New Fault Model in Testing
Membership in Professional Bodies
  • IEEE Circuits and Systems Society (CAS)
  • Indian Society for Technical Education (ISTE)
  • Indian Society of Systems for Science & Engineering (ISSE)
  • The Institution of Electronics and Telecommunication Engineers (IETE)
Awards

Certificates, Awards & Recognitions

  • Co-Mentor for IEEE Early Young Engineers Innovation Club
  • Acted as Publicity and Social Media Chair in “3rd EAI International Conference on Ubiquitous Communications and Network Computing”
  • Acted as Workshop Chair in “3rd EAI International Conference on Ubiquitous Communications and Network Computing”
Courses Taught
  • VLSI Design
  • VLSI System Design
  • Microprocessor & Microcontroller
  • Digital System Design
  • CMOS Integrated Circuits
  • Static Timing Analysis
Student Guidance

Undergraduate students

Sl. No. Name of the Student(s) Topic Status – Ongoing/ Completed Year of Completion
1 MOHNESH.Y NARAYANAN.S KP.AKASH Design of Convolutional Neural Network Algorithm to improve the image resolution Ongoing –
 2 R.PreethiVedant Kulkarni

Dondapati Akash Raj

 Energy Efficient Design Techniques forNeural Computing Ongoing
 3 C.VENKATESH

N.SHIVA KUMAR

O ARYAN RAGHUNATH

 Area Efficient Low Power
Memory Based FFT
Processor Design		  Completed 2020
4 V.AKHILA

G.NIKHIL

B.MADHUMITHA

 “Design of Reduced Precision Redundancy Multiply and Accumulate”  Completed 2020
5 J.SATHAVARTH

K.PRAVEEN

K.V.S.RAHUL

 Efficient MAC design based on Tunable Floating-Point Adder  Completed 2020
6 Harini M “Developing a Utility to Validate Opcua Nodeset Files”  Completed 2019
7 J SESHA SAI RAKESH Infotainment System Test  Completed 2019


Postgraduate students

Sl. No. Name of the Student(s) Topic Status – Ongoing/ Completed Year of Completion
1 Sachin Kumar Pandey low power Hybrid-BIST design- An upgraded version for enhanced performance Ongoing –
 2 Y. Harshitha Low complexity and High performance LUT based Feed Forward FFT architecture Completed 2020

Research Scholars

Sl. No. Name of the Student(s) Topic Status – Ongoing/Completed Year of Completion
1 PriyaDarsini R Deep Learning Based Emotion Recognition System Ongoing  
2 Bukke Madhavi Speech Recognition System using Artificial Neural Network Ongoing  
3 Kaveri Hatti Design and Implementation of optimized PUF Architecture for Hardware Security and Trust Ongoing  
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