Back close
Admissions

Sreehari K. N.

Asst. Professor, Electronics and Communication Engineering, School of Engineering, Amritapuri

Qualification: B-Tech, M.Tech
sreeharikn@am.amrita.edu
Research Interest: Cryptography, Digital VLSI Design, Hardware Security

Bio Publications
Bio

Sreehari K. N. currently serves as Assistant Professor (Senior Grade) at the Department of Electronics and Communication Engineering, School of Engineering, Amrita Vishwa Vidyapeetham, Amritapuri campus. He has completed  B. Tech. in Electronics and communication Engineering from Calicut university and  M. Tech. in VLSI design from Amrita Vishwa Vidyapeetham. He is currently pursuing Ph.D at Amrita Vishwa Vidyapeetham

His research areas include Hardware security, VLSI design and Embedded system . He has 8 years of teaching experience at Amrita Vishwa Vidyapeetham

Qualification

  • Ph. D.: On-going
  • M. Tech. : VLSI Design
    Amrita School of Engineering, Amritapuri camps
  • B. Tech. : Electronics and Communication Engineering
    Calicut university
Publications

Conference Paper

Year : 2020

VLSI Implementation of Turbo Coder for LTE using Verilog HDL

Cite this Research Publication : V. Akshaya, K. N. Sreehari, and Anu Chalil, “VLSI Implementation of Turbo Coder for LTE using Verilog HDL”, in 2020 Fourth International Conference on Computing Methodologies and Communication (ICCMC), Erode, India, India, 2020

Publisher : 2020 Fourth International Conference on Computing Methodologies and Communication (ICCMC),

Year : 2020

Performance Evaluation of LUTs in FPGA in Different Circuit Topologies

Cite this Research Publication :
Nirmal Vinod, K. V. Abhishek Neelakandan, R. Udith, K. Sayooj Devadas, K. Dinesh, Anu Chalil, and K. N. Sreehari, “Performance Evaluation of LUTs in FPGA in Different Circuit Topologies”, in 2020 International Conference on Communication and Signal Processing (ICCSP), Chennai, India, India, 2020.


Publisher : 2020 International Conference on Communication and Signal Processing (ICCSP)

Year : 2019

Systolic array implementation of mix column and inverse mix column of AES

Cite this Research Publication : S. M., K. N. Sreehari, and R., B., “Systolic array implementation of mix column and inverse mix column of AES”, in Proceedings of the 2019 IEEE International Conference on Communication and Signal Processing, ICCSP 2019, 2019, pp. 730-734.

Publisher : Proceedings of the 2019 IEEE International Conference on Communication and Signal Processing, ICCSP 2019

Year : 2018

Implementation of hybrid cryptosystem using DES and MD5

Cite this Research Publication : K. N. Sreehari and Bhakthavatchalu, R., “Implementation of hybrid cryptosystem using DES and MD5”, in 2018 3rd International Conference on Communication and Electronics Systems (ICCES), 2018

Publisher : 2018 3rd International Conference on Communication and Electronics Systems

Year : 2018

Efficient key management methods for symmetric cryptographic algorithm

Cite this Research Publication : K. N. Sreehari, “Efficient key management methods for symmetric cryptographic algorithm”, in 2018 IEEE International Conference on Computational Intelligence and Computing Research (ICCIC), 2018

Publisher : 2018 IEEE International Conference on Computational Intelligence and Computing Research

Conference Proceedings

Year : 2020

VLSI Implementation of Reed Solomon Codes

Cite this Research Publication : K. S. T., Anu Chalil, and K. N. Sreehari, “VLSI Implementation of Reed Solomon Codes”, in 2020 Fourth International Conference on Computing Methodologies and Communication (ICCMC), 2020

Publisher : 2020 Fourth International Conference on Computing Methodologies and Communication (ICCMC)

Admissions Apply Now