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Dr. Prabhu E.

Assistant Professor (S. G), Electronics and Communication Engineering, School of Engineering, Coimbatore

Qualification: M.E, Ph.D
e_prabhu@cb.amrita.edu
Ph: +91-9994205499
Prabhu E Google Scholar Profile
Research Interest: Low-Power & High-Performance Arithmetic Circuits Design, Signal Processing Architectures

Bio

Dr. Prabhu E. (Prabhu Eswaran) received the Bachelor of Engineering degree in Electronics and Communication Engineering from Muthayammal Engineering College, Rasipuram, India, in 2006, the Master of Engineering degree in VLSI Design from Kongu Engineering College, Perundurai, Erode, India, in 2008. He received his Ph. D. degree in Electronics and Communication Engineering from Anna University, Chennai, in 2019.

He has served as Technical Program Committee Member in International Conferences. He is an Associate Member of the IETE. His research interests include Low-power and High-performance VLSI Circuits Design, VLSI Testing, Digital System Design, VLSI Signal Processing and IoT”.

 

Publications

Journal Article

Year : 2020

Robust Smart Home Monitoring System Based on 802.11 Mesh Network

Cite this Research Publication : L. Samraj S., V., B. N., A., A., R., S., and Prabhu E., “Robust Smart Home Monitoring System Based on 802.11 Mesh Network”, Lecture Notes in Networks and Systems, vol. 98, pp. 38-47, 2020.

Publisher : Lecture Notes in Networks and Systems,

Year : 2020

Multi constraints applied energy efficient routing technique based on ant colony optimization used for disaster resilient location detection in mobile ad-hoc network

Cite this Research Publication : C. Jeba A. Malar, Kowsigan, M., Krishnamoorthy, N., Karthick, S., Prabhu E., and Venkatachalam, K., “Multi constraints applied energy efficient routing technique based on ant colony optimization used for disaster resilient location detection in mobile ad-hoc network”, Journal of Ambient Intelligence and Humanized Computing , 2020.

Publisher : Journal of Ambient Intelligence and Humanized Computing

Year : 2020

Combining statistical models using modified spectral subtraction method for embedded system

Cite this Research Publication : V. R. Balaji, Maheswaran S., M. Rajesh Babu, M. Kowsigan, Prabhu E., and Venkatachalam K., “Combining statistical models using modified spectral subtraction method for embedded system”, Microprocessors and Microsystems, vol. 73, p. 102957, 2020.

Publisher : Microprocessors and Microsystems

Year : 2019

IoT Based Food Inventory Tracking System

Cite this Research Publication : S. P. Lakshmi Narayan, Kavinkartik, E., Prabhu E., ,, ,, D., C., O., M., and K.-C., L., “IoT Based Food Inventory Tracking System”, Communications in Computer and Information Science, vol. 968, pp. 41-52, 2019.

Publisher : Springer Verlag

Year : 2019

A Delay Efficient Vedic Multiplier

Cite this Research Publication : Prabhu E., Mangalam, H., and Gokul, P. R., “A Delay Efficient Vedic Multiplier”, Proceedings of the National Academy of Sciences, India Section A: Physical Sciences, vol. 89, no. 2, pp. 257–268, 2019.

Publisher : Proceedings of the National Academy of Sciences, India Section A: Physical Sciences

Year : 2016

Power Optimized Vedic Parallel MAC Unit: GDI Technique

Cite this Research Publication : Prabhu E. and Mangalam, H., “Power Optimized Vedic Parallel MAC Unit: GDI Technique”, Asian Journal of Information Technology, vol. 15, no. 16, pp. 2954-2957, 2016.

Publisher : Asian Journal of Information Technology

Year : 2016

Design of area and power efficient Radix-4 DIT FFT butterfly unit using floating point fused arithmetic

Cite this Research Publication : Prabhu E., Mangalam, H., and Karthick, S., “Design of area and power efficient Radix-4 DIT FFT butterfly unit using floating point fused arithmetic”, Journal of Central South University, vol. 23, pp. 1669-1681, 2016.

Publisher : Journal of Central South University, Central South University of Technology

Year : 2015

Low power systolic array based digital filter for DSP applications

Cite this Research Publication : S. Karthick, Valarmathy, S., and Prabhu E., “Low power systolic array based digital filter for DSP applications”, Scientific World Journal, vol. 2015, pp. 1-6, 2015.

Publisher : Hindawi Publishing Corporation

Year : 2015

Design and implementation of digital household energy meter with a flexible billing unit using FPGA

Cite this Research Publication : Prabhu E., I, V. R., R, D. Udhayan, S, R., P, W. Thadeus, and S, A., “Design and implementation of digital household energy meter with a flexible billing unit using FPGA”, International Journal of Applied Engineering Research, vol. 10, pp. 28331-28340, 2015.

Publisher : International Journal of Applied Engineering Research

Year : 2015

An Efficient 16-Bit Carry Select Adder With Optimized Power and Delay

Cite this Research Publication : Prabhu E. and Reddy, B. Madhukar, “An Efficient 16-Bit Carry Select Adder With Optimized Power and Delay”, International Journal of Applied Engineering Research, vol. 10, 2015.

Publisher : International Journal of Applied Engineering Research

Year : 2015

Parallel multiplier-accumulator unit based on Vedic mathematics

Cite this Research Publication : Prabhu E. and S, J., “Parallel multiplier-accumulator unit based on Vedic mathematics”, ARPN Journal of Engineering and Applied Sciences, vol. 10, 2015.

Publisher : ARPN Journal of Engineering and Applied Sciences

Year : 2014

Low Power Heterogeneous Adder

Cite this Research Publication : S. Karthick, Valarmathy, S., and Prabhu E., “Low Power Heterogeneous Adder”, International Journal of Applied Engineering and Research, vol. 9, no. 22, pp. 13449-13464, 2014.

Publisher : International Journal of Applied Engineering and Research

Year : 2013

Reconfigurable fir filter with radix-4 array multiplier

Cite this Research Publication : Sa Karthick, Valarmathy, Sa, and Prabhu E., “Reconfigurable fir filter with radix-4 array multiplier”, Journal of Theoretical and Applied Information Technology, vol. 57, pp. 326-336, 2013.

Publisher : Journal of Theoretical and Applied Information Technology

Year : 2013

A low power multiplier using encoding and bypassing technique

Cite this Research Publication : Prabhu E., Mangalam, H., and Karthick, S., “A low power multiplier using encoding and bypassing technique”, Journal of Theoretical and Applied Information Technology, vol. 57, pp. 251-260, 2013.

Publisher : Journal of Theoretical and Applied Information Technology

Conference Paper

Year : 2019

Power and Area Efficient FSM with Comparison-Free Sorting Algorithm for Write-Evaluate Phase and Read-Sort Phase

Cite this Research Publication : T. A. S. Bhargav and Prabhu E., “Power and Area Efficient FSM with Comparison-Free Sorting Algorithm for Write-Evaluate Phase and Read-Sort Phase”, in Advances in Signal Processing and Intelligent Recognition Systems, Singapore, 2019, vol. 968, pp. 433-442.

Publisher : Springer Singapore

Year : 2019

Design of Low Power RSC Encoder Using Reversible Logic

Cite this Research Publication : J. Aishvarya, Manindra, P. S. N. V. V., P. Priya, S., Rao, K. Vaseeshwar, and Prabhu E., “Design of Low Power RSC Encoder Using Reversible Logic”, in International Conference on Intelligent Data Communication Technologies and Internet of Things (ICICI) 2018, Cham, 2019.

Publisher : Springer International Publishing, Cham

Year : 2018

An Analysis of Cognitive Radio Spectrum Sensing Methods in Communication Networks

Cite this Research Publication : S. Hemalatha and Prabhu E., “An Analysis of Cognitive Radio Spectrum Sensing Methods in Communication Networks”, in 2018 International Conference on Communication and Signal Processing (ICCSP), 2018, pp. 462-467.

Publisher : 2018 International Conference on Communication and Signal Processing (ICCSP)

Year : 2018

Deep Learning and IoT for Smart Agriculture Using WSN

Cite this Research Publication : A. Mozhi S. Varman, Baskaran, A. R., Aravindh, S., Prabhu E., and M., K., “Deep Learning and IoT for Smart Agriculture Using WSN”, in 2017 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2017, 2018.

Publisher : Institute of Electrical and Electronics Engineers Inc.

Year : 2018

Smart Energy Meter for Power Grid Using Fuzzy Logic

Cite this Research Publication : A. R. Baskaran, Aravindh, S., Varman, S. A. M., Prabhu E., and M., K., “Smart Energy Meter for Power Grid Using Fuzzy Logic”, in 2017 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2017, 2018.

Publisher : Institute of Electrical and Electronics Engineers Inc.

Year : 2018

Power And Delay Efficient Exact Adder For Approximate Multiplier

Cite this Research Publication : V. V. Kavipranesh, Janarthanan, J., Amruth, T. N., Harisuriya, T. M., and Prabhu E., “Power And Delay Efficient Exact Adder For Approximate Multiplier”, in 2018 International Conference on Advances in Computing, Communications and Informatics (ICACCI), 2018.

Publisher : 2018 International Conference on Advances in Computing, Communications and Informatics (ICACCI).

Year : 2014

Performance comparison of multipliers based on Square and Multiply and montgomery algorithms

Cite this Research Publication : P. R. Gokul, Prabhu E., and Mangalam, H., “Performance comparison of multipliers based on Square and Multiply and montgomery algorithms”, in Green Computing Communication and Electrical Engineering (ICGCCEE), 2014 International Conference on, 2014.

Publisher : ICGCCEE

Conference Proceedings

Year : 2019

Improved Test Coverage by Observation Point Insertion for Fault Coverage Analysis

Cite this Research Publication : V. Veena, Prabhu E., and Mohan, N., “Improved Test Coverage by Observation Point Insertion for Fault Coverage Analysis”, 2019 3rd International Conference on Trends in Electronics and Informatics (ICOEI). 2019.

Publisher : ICOEI

Year : 2019

An Efficient Fused Floating-Point Dot Product Unit Using Vedic Mathematics

Cite this Research Publication : D. L. Prasanna and Prabhu E., “An Efficient Fused Floating-Point Dot Product Unit Using Vedic Mathematics”, 2019 3rd International Conference on Trends in Electronics and Informatics (ICOEI). 2019.

Publisher : ICOEI

Year : 2019

Test pattern generation using NLFSR for detecting single stuck-at faults

Cite this Research Publication : V. N. Teja and Prabhu E., “Test pattern generation using NLFSR for detecting single stuck-at faults”, Proceedings of the 2019 IEEE International Conference on Communication and Signal Processing, ICCSP 2019. Institute of Electrical and Electronics Engineers Inc., pp. 716-720, 2019.

Publisher : Institute of Electrical and Electronics Engineers Inc

Year : 2017

Design of a Novel Reversible Nlfsr

Cite this Research Publication : N. Krishna, Murugappan, V., Harish, R., Midhun, M., and Prabhu E., “Design of a Novel Reversible Nlfsr”, 2017 International Conference on Advances in Computing, Communications and Informatics (ICACCI). pp. 2279-2283, 2017.

Publisher : 2017 International Conference on Advances in Computing, Communications and Informatics

Year : 2017

Design of a Novel Reversible Nlfsr

Cite this Research Publication : N. Krishna, Murugappan, V., Harish, R., Midhun, M., and Prabhu E., “Design of a Novel Reversible Nlfsr”, 2017 International Conference on Advances in Computing, Communications and Informatics (ICACCI). pp. 2279-2283, 2017.

Publisher : 2017 International Conference on Advances in Computing, Communications and Informatics (ICACCI)

Year : 2016

Design of high speed multiplier using modified booth algorithm with hybrid carry look-ahead adder

Cite this Research Publication : R. Balakumaran and Prabhu E., “Design of high speed multiplier using modified booth algorithm with hybrid carry look-ahead adder”, Proceedings of IEEE International Conference on Circuit, Power and Computing Technologies, ICCPCT 2016. Institute of Electrical and Electronics Engineers Inc., pp. 1-7, 2016.

Publisher : Proceedings of IEEE International Conference on Circuit, Power and Computing Technologies, ICCPCT 2016, Institute of Electrical and Electronics Engineers Inc., p.1-7.

Year : 2014

A versatile low power design of bit-serial multiplier in finite fields GF (2m)

Cite this Research Publication : R. M, Prabhu E., and H, M., “A versatile low power design of bit-serial multiplier in finite fields GF (2m)”, Communications and Signal Processing (ICCSP), 2014 International Conference on. pp. 748-752, 2014.

Publisher : Communications and Signal Processing (ICCSP), 2014 International Conference on

Year : 2014

Touch Based Gesture Recognition using Arduino

Cite this Research Publication : A. T.R.S, R, J. Joe Antoro, R, K., S, N., T, P., R, P., and Prabhu E., “Touch Based Gesture Recognition using Arduino”, Proceedings of IRF International Conference. pp. 98-100., 2014.

Publisher : Proceedings of IRF International Conference

Year : 2013

Design of Low Power Digital FIR Filter based on Bypassing Multiplier

Cite this Research Publication : Prabhu E., H, M., and K, S., “Design of Low Power Digital FIR Filter based on Bypassing Multiplier”, International Journal of Computer Applications, vol. 70. Foundation of Computer Science, NewYork, USA, pp. 5-8, 2013.

Publisher : International Journal of Computer Applications

Education
  • 2019: Ph. D. in Low Power VLSI
    Anna University
  • 2008: M. E. in VLSI Design
    Anna University, Kongu Engineering College
  • 2006: B. E. in Electronics and Communication
    Anna University, Muthayammal Engineering College
Professional Appointments
Year Affiliation
2012- Present Assistant Professor (Senior Grade), Department of Electronics and Communication Engineering, Amrita School of Engineering, Coimbatore, Amrita Vishwa Vidyapeetham (Deemed to be University), India
Domain : Teaching and Research
2010 – 2012 Assistant Professor, Department of Electronics and Communication Engineering, Amrita School of Engineering, Coimbatore, Amrita Vishwa Vidyapeetham (Deemed to be University), India
Domain : Teaching and Research
2009 – 2010 Assistant Professor, Electronics and Communication Engineering department, Periyar Maniammai Institute of Science & Technology (Deemed to be University),, Thanjavur, India
Domain : Teaching
2008 – 2009 Lecturer, Electronics and Communication Engineering department, Hindustan Institute of Technology & Science (Deemed to be University), Chennai, India
Domain : Teaching
Academic Responsibilities
S.No Position Class / Batch Responsibility
1. Batch Coordinator 2013-17 Interact with students (representatives section wise), Class advisors, and Course handling faculty, identify the problems and find solutions in consultation with the Chairperson. Coordinating class committee meeting.
2. Class Adviser 2013 -17 Interact with all students in my section andCourse handling faculty, identify the problems and find solutions in consultation with the batch coordinator and the Chairperson.
3. Time-Table Coordinator 2015-17 Course allocation, Prepare Individual time table, class time table, lab occupancy and work load in consultation with the Chairperson.
4. Class Adviser 2018-22 Interact with all students,Course handling faculty, identify the problems and find solutions in consultation with the batch coordinator and the Chairperson.
Undergraduate Courses Handled
  1. Digital Circuits and Systems
  2. VLSI Design
  3. Electromagnetic Theory
  4. Transmission Lines and Waveguides
  5. Fundamentals of Electrical Engineering
Post-Graduate / PhD Courses Handled
  1. Low Power VLSI Circuits (VLSI Design)
  2. Design For Test(VLSI Design)
Participation in Faculty Development / STTP / Workshops /Conferences
SNo Title Organization Period Outcome
1. Two-week ISTE STTP Amrita, Coimbatore January 30 – February 4, 2018 Course Plan development for UG
2. Workshop on Xilinx Vivado System Generator and Analog Discovery Kit Amrita, Coimbatore September 21 – 22, 2015 Acquired good knowledge in Vivado Tool
3. Research Seminar on Emerging Perspective in Nanoelectronics R&D Amrita, Coimbatore September 19, 2014 Effective sharing of knowledge
4. Two-week ISTE Workshop on Signals and Systems Amrita, Coimbatore January 2 – 12, 2014 Acquired good knowledge Digital signals and Systems
5. Two-week ISTE Workshop on Analog Electronics Amrita, Coimbatore June 4 – 14, 2013 Acquiredgood knowledge inAnalog Electronics
6. Faculty Development Program on Electromagnetic Theory Amrita, Amritapuri January 5 – 7, 2012 Acquired good knowledge in Electromagnetic Theory
7. Faculty Development Programme onTeaching Basic Electrical Engineering Amrita, Coimbatore June 20 – 24, 2011 Acquired knowledge in Electrical technology
8. ISTE Sponsored Two Day Workshop on System Simulation Tools Amrita, Coimbatore July 19 – 20, 2010 Acquired knowledge in System simulation tools
9. Workshop on MATLAB and its Application PeriyaManiammai University, Thanjavur September 2 – 3, 2009 Acquired knowledge in available tool boxes
10. CSIR Sponsored Two Days Technical Seminar on VLSI Digital Signal Processing and its Applications MEPCO SCHLENK Engineering College, Sivakasi September 18 – 19, 2009 Acquired knowledge in Digital Signal Processing Techniques
11. Workshop on Role of Community Radio in Social Transformation (NRCST 2009) PeriyaManiammai University, Thanjavur October 30, 2009 Understood Role of Community Radio in Social Transformation
12. Faculty Development Programme on Soft Skills and Class Room Dynamics Hindustan Institute of Technology & Science, Chennai July 28 – October 3, 2008 UnderstoodClass Room Dynamics
Organizing Faculty Development / STTP / Workshops /Conferences
SNo Title Organization Period Outcome
1. One-Day Workshop on FPGAs in Networking ECE Department, Amrita, Coimbatore 18th April 2015 Students were able to understand Network basics, Routing concepts and Applications of FPGAs in networking
2. One-Day Workshop on The Art of Technical Paper Writing and Professional Ethics ECE Department, Amrita, Coimbatore 16th October 2014 Students were able to understand how select paper, University rules and regulations, professional ethics on paper writing and plagiarism
Academic Research – PG Projects
SNo Name of the Scholar Programme Specialization Duration Status
1. Remy M VLSI Design Low Power VLSI 2013-14 Completed
2. Gokul P R VLSI Design Low Power VLSI 2013-14 Completed
3. BobbalaMadhukar Reddy VLSI Design Low Power VLSI 2014-15 Completed
4. Jithin S VLSI Design Low Power VLSI 2014-15 Completed
5. R. Balakumaran VLSI Design Low Power VLSI 2015-16 Completed
6. K. Deepak Kartik VLSI Design Artificial Neural Network 2015-16 Completed
7. Tennety Aditya SrinivasBhargav VLSI Design Low Power VLSI 2017-18 Completed
8. Hemalatha S VLSI Design VLSI Communication 2017-18 Completed
9. N VarunTeja VLSI Design Low Power VLSI 2018-19 Ongoing
10. Dasari Lakshmi Prasanna VLSI Design Low Power VLSI 2018-19 Ongoing
Recognition
  • Received a ‘Best Paper Award’ for the research paper titled, “Smart Energy Meter for Power Grid using Fuzzy Logic”, 2017 IEEE International Conference on Computational Intelligence and Computing Research (IEEE ICCIC), Tamilnadu College of Engineering, Karumathampatti, Coimbatore, India, pp.1-5, December 14-16, 2017.
  • Served as ‘Technical Program Committee Member’ of 4th International Conference on Advances in Computing, Communications and Informatics (ICACCI-2016), September 21-24, 2016.
  • Served as Technical Program Committee Member of 4th International Conference on Advances in Computing, Communications and Informatics (ICACCI-2015), August 10-13, 2015.
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