Back close
Publications
Design of Power and Area Optimized 16 – bit Multiplier

Citation : Tushar R, Shruti Sivaramakrishnan, Ramesh S R, Design of Power and Area Optimized 16 – bit Multipl ...

Publisher :IEEE

Publications
Approximate Computing Technique based Convolutional Neural Networks for Pattern Recognition

Citation : Sujith S, Ramesh S R, Approximate Computing Technique based Convolutional Neural Networks for Patter ...

Publisher :IEEE

Publications
Supervised Learning-Driven Hardware Trojan Detection with Adaptive Genetic Algorithm Optimization

Citation : Varadha S, Ramesh S R, Supervised Learning-Driven Hardware Trojan Detection with Adaptive Genetic Al ...

Publisher :IEEE

Publications
Efficient Hardware Implementation of the Sobel Operator using FPGA

Citation : Ambagouri Nambiar, Chippada Bhanu Prakash, Goukanapalli Siddartha Reddy, S R Ramesh, Efficient Hardw ...

Publisher :IEEE

Publications
Next-Generation Predictive Models for Exposing Hardware Trojans at the Architectural Abstraction Level Using Conditional Signal Features

Citation : Kanchi Sreekruthi, Ramesh S R, Next-Generation Predictive Models for Exposing Hardware Trojans at th ...

Publisher :IEEE

Publications
Design and Analysis of a Cube Calculator Using QCA Technology and its Comparison with CMOS

Citation : Nandhaguru S, Yuvan Pranav Murugesan, Ramesh S R, Design and Analysis of a Cube Calculator Using QCA ...

Publisher :IEEE

Publications
Power and Area Optimized FFT Architecture Through Multiplier-Level Hardware Design

Citation : Ezhilkirthik, Sujith Krishna, Uday Venu Gopal, Ramesh, Power and Area Optimized FFT Architecture T ...

Publisher :IEEE

Publications
Design and Implementation of a Low Area Single-Switch Morse Code Decoder on FPGA for Assistive Technology

Citation : Pedada Venkata Abhiram, Abhishikth Chittala, E Jagan, Ramesh S R, Design and Implementation of a Low ...

Publisher :IEEE

Publications
A Lightweight Ensemble Framework for Gate-Level Hardware Trojan Detection

Citation : Maganti Shanmukha Sri Datta, Ramesh S R, A Lightweight Ensemble Framework for Gate-Level Hardware Tr ...

Publisher :IEEE

Publications
Area-delay efficient BCD adder in quantum dot cellular automata

Citation : Ramesh S R, Jagadeep T, Maddala Vamsi Krishna, Sista Venkata Datta Sai Abhishek, Suraj Sai Vegunta, ...

Publisher :IOP Publishing

Publications
Numerical Solution of Partial Differential Equations

Citation : Roushan Kumar, Rakhi Tiwari, Rashmi Prasad, Numerical Solution of Partial Differential Equations, Ma ...

Publisher :Wiley

Publications
Artificial Intelligence in Nanotechnology Transforming Innovation at the Atomic Scale

Citation : Salaheldin Elabiad, Artificial Intelligence in Nanotechnology Transforming Innovation at the Atomic ...

Publisher :Elsevier BV

Admissions Apply Now