Faculty Bio

Dr. Ramesh S. R. currently serves as an Assistant Professor (Senior Grade) in the Department of ECE, Ettimadai Campus. He joined Amrita in July 2007. He completed his Ph.D in Static Timing Analysis from Anna University, Chennai in 2020 and Master of Engineering in VLSI Design from Arulmigu Kalasalingam College of Engineering (Anna University, Chennai ) in 2007. He did his Bachelor of Engineering in ECE from Cape Institute of Technology (Anna University, Chennai) in 2005. His areas of interest include Static Timing analysis, Hardware Trojan Detection, VLSI CAD, FPGA Logic Architectures, Low power VLSI, IOT and Embedded Sensor Networks. He is an Associate Member in IETE. He is a reviewer for many reputed International Journals. He is currently guiding research scholars and serves as a Doctoral Committee member for various students.

Education

• Ph. D. in VLSI
  Anna University, Chennai
• 2007: M. E. in VLSI
  Anna University, Chennai/ Arulmigu Kalasalingam College of Engineering

Professional Experience

Academic Responsibilities

Undergraduate Courses Handled

1. CMOS Integrated Circuits
2. Electronics Engineering
3. Electronic Circuits
4. VLSI Design
5. VLSI Technology
6. Linear Integrated Circuits

Post-Graduate / PhD Courses Handled

1. Solid State Devices (VLSI Design)
2. CAD for VLSI (VLSI Design)
3. Micro Electromechanical Systems (VLSI Design)
4. Static Timing Analysis (VLSI Design)
5. Analysis and Design of Mixed Signal VLSI Circuits (VLSI Design)
6. VLSI Fabrication Technology (VLSI Design)

Participation in Faculty Development / STTP / Workshops /Conferences

Organizing Faculty Development / STTP / Workshops /Conferences

Academic Research – PG Projects

Research Expertise

• As of July 2021 the number of students working at various levels under his supervision are:
  • M.Tech – 3 (Static Timing Analysis and Hardware Trojan Detection)
  • B.Tech – 2 (IOT, VLSI)

PG Projects

• A MUX based Latch Technique for Hardware Trojan Detection
• Hardware Trojan Detection using Ring Oscillator
• Flip Flop Based Approach for Logic Encryption Techniques
• An Approach for Statistical Parameter Estimation and Test pattern Generation
• Power and Area Efficient Booth Multiplier
• MAC Unit design and its impact on a Trained Neural Network
• Hybrid Adder Design for High Speed Applications
• Power and Delay Efficient ALU using Vedic Techniques
• An Efficient Booth Multiplier using Probabilistic Approach
• An Efficient Linear Pipeline Circuit with Optimal Power Delay Product using Soft Edge Flip flops
• Analytical Modeling of Logic Resource Utilization for Early Stage FPGA Architecture Development
• Statistical Static Timing Analysis Using Parallel Processing of Timing Graphs
• Design And Implementation of 1D Discrete Multiwavelet Transform For Infrasound Classification
• Statistical Timing Analysis Using Probabilistic Approaches
• Decomposition And Synthesis of XOR Based Logic Circuits For LUT Based FPGAs
• Probabilistic Activity Estimator For4-input LUT Based FPGA Circuits
• Data Flow Transformation for Optimization of Digital/DSP Circuits
• Design of an Optimized Double Precision Floating Point Divider Using Cache Memory and a Multiplier
• FPGA Implementation of Low Density Parity Check Code Decoder

UG Projects

• FPGA Implementation of Power and Area Efficient 32 bit MAC Unit
• A Signed Vedic Multiplier using Redundant Binary Representation
• Hardware Trojan Detection using Supervised Machine Learning
• Development of a System to measure Hemoglobin non-invasively
• Low Delay VLSI Architecture Design for Logarithmic Multiplication
• A Low Power Cubic Computation Unit using Vedic Techniques
• Design of Low power Binary Square rooter using Reversible Logic
• Design of Power Efficient Approximate Multipliers
• FPGA Implementation of Low power LNS Arithmetic Unit by LUT Partitioning
• A Comparative analysis on Static and Statistical Timing Techniques
• An Efficient FIR Filter Design Using Common Sub Expression Elimination Method
• Multimode Floating Point Adder and Multiplier
• Power Estimation of Combinational Circuits Using Spatial Correlation

Teaching

• Electronic Circuits
• VLSI Technology
• Digital IC Design
• VLSI Design
• VLSI System Design
• Linear Integrated Circuits
• Static Timing Analysis
• Solid State Devices
• Semiconductor Memory Design