Qualification: 
Ph.D, MS, B-Tech
sundar@am.amrita.edu

Sundar Gopalan received his Bachelor of Technology degree from the Institute of Technology, Banaras Hindu University, Varanasi, India, in May 1995. He completed his M.S. and Ph.D. degrees from the University of Texas at Austin, USA in the area of Microelectronic Engineering in 2002. He worked in International Sematech, a semiconductor research consortium located in Austin, Texas, USA, as a Post-Doc and Process research engineer for two years in the Advanced Gate Stack Engineering Group. There he was involved in studying and designing new gate stack structures for the next generation CMOS Technology. He joined the Department of Electronics and Communication Engineering at Amrita School of Engineering, Amritapuri Campus, India, in August of 2004. He is serving as professor and chairperson of ECE department. He has authored/co-authored more than 42 International publications. He specializes in the areas of Electronic Materials, Semiconductor Devices, VLSI Fabrication, Materials Characterization, Processing and Mechanical Behavior of Materials.

Publications

Publication Type: Journal Article

Year of Publication Publication Type Title

2018

Journal Article

Dr. Sundararaman Gopalan, Ramesh, S., Dutta, S., and Garbhapu, V. Virajit, “Effects of substrate heating and post-deposition annealing on characteristics of thin MOCVD HfO 2 films”, IOP Conference Series: Materials Science and Engineering, vol. 310, p. 012125, 2018.[Abstract]


It is well known that Hf-based dielectrics have replaced the traditional SiO 2 and SiON as gate dielectric materials for conventional CMOS devices. By using thicker high-k materials such as HfO 2 rather than ultra-thin SiO2, we can bring down leakage current densities in MOS devices to acceptable levels. HfO 2 is also one of the potential candidates as a blocking dielectric for Flash memory applications for the same reason. In this study, effects of substrate heating and oxygen flow rate while depositing HfO 2 thin films using CVD and effects of post deposition annealing on the physical and electrical characteristics of HfO 2 thin films are presented. It was observed that substrate heating during deposition helps improve the density and electrical characteristics of the films. At higher substrate temperature, V fb moved closer to zero and also resulted in significant reduction in hysteresis. Higher O 2 flow rates may improve capacitance, but also results in slightly higher leakage. The effect of PDA depended on film thickness and O 2 PDA improved characteristics only for thick films. For thinner films forming gas anneal resulted in better electrical characteristics.

More »»

2018

Journal Article

F. Chidanand Robert, Sisodia, G. Singh, and Dr. Sundararaman Gopalan, “A critical review on the utilization of storage and demand response on the implementation of renewable energy microgrids”, Sustainable Cities and Society, Special issue on Microgrid Implementation and Optimization, Elsevier, vol. 40, pp. 735 - 745, 2018.[Abstract]


Renewable energy generation represents a unique solution to ensure the sustainable development of society. However, its fluctuating nature can disturb the energy balance mechanism of the power grid. In microgrids powered by renewables, the issue is even more critical. Fossil fuel generation typically supplements renewables but storage and demand response can be more flexible and cost effective. This paper is an overview of recent undertakings that present storage and demand response techniques as solutions for the stable operation of renewable energy microgrids. The critical analysis of the recent papers in this area reveals that the parameters used for modeling storage have been simplified (efficiency, dynamic behavior at fast rate of discharge, aging…) and that the demand response incentives have been assumed to be enough for users to be willing to participate in demand response programs. These assumptions make the proposed solutions too inaccurate to be implemented on the field yet. If renewables have to be implemented on a large scale, specific and accurate models have to be used. By building on the current research presented here, much work can be converted into real advances in the field of renewable energy integration in microgrids.

More »»

2018

Journal Article

F. C. Robert, Sisodia, G. S., and Dr. Sundararaman Gopalan, “Affordable Rural Electricity Through Intelligent Grid Extension And Local Renewable Energy Generation”, Sustainable Cities and Society, Special issue on Microgrid Implementation and Optimization; Elsevier, 2018.

2014

Journal Article

S. Ramesh, Dutta, S., Shankar, B., and Dr. Sundararaman Gopalan, “Identification of current transport mechanism in Al2O3 thin films for memory applications”, Applied Nanoscience, vol. 5, pp. 115-123, 2014.[Abstract]


The effect of oxygen anneal on the electrical characteristics, especially on the current transport mechanism, of Al2O3 films in the thickness range of 10–30 nm was examined in detail. The analyses were performed at electric fields of ≤2.5 MV/cm to effectively address the reliability of Al2O3-based devices operating in the low electric field regime. The general conduction mechanism equations were used to simulate the expected current density (J) values for a given electric field (E) range. The characteristic linear plots of the conduction mechanisms were then used to compare the experimental and simulated data to identify the most probable mechanism occurring in the dielectric. Parameters like barrier height and activation energy were extracted from the fit. It was found that oxygen anneal has profound effects on the electrical properties of Al2O3 films, with annealed films demonstrating a different conduction mechanism than their unannealed counterparts, along with significant improvement in the leakage current and barrier height. This kind of analyses will help optimize the process conditions for Al2O3 deposition and provide an optimal range for device operation, thus improving the reliability of Al2O3 films for applications in CMOS logic and Flash memory.

More »»

2012

Journal Article

S. Dutta, Ramesh, S., Shankar, B., and Dr. Sundararaman Gopalan, “Effect of PVD process parameters on the quality and reliability of thin (10–30 nm) Al2O3 dielectrics”, Applied Nanoscience, vol. 2, pp. 1–6, 2012.

2011

Journal Article

N. Alex Jacob, Pillai, V., Nair, S., Harrell, D. Toshio, Delhommer, R., Chen, B., Sanchez, I., Almstrum, V., and Dr. Sundararaman Gopalan, “Low-Cost Remote Patient Monitoring System Based on Reduced Platform Computer Technology”, Telemedicine and e-Health, vol. 17, pp. 536–545, 2011.[Abstract]


Telemedicine is a well-accepted method providing healthcare benefits to people over long distances. However, in normal telemedicine practices, dedicated complex hardware and network backbones for data collection and communication make the system unintelligible to the common man. Centralization of telemedicine units also makes it accessible only to the immediate surrounding community. In an attempt to address these issues, a study aimed at developing a low-cost remote patient monitoring (RPM) system based on reduced platform computer technology has been carried out. The main focus of the work was to develop a real-time, universal serial bus plug-in module for a portable RPM system, specifically the XO Laptop. In addition, this system is also intended to serve as an educational tool especially for the One Laptop per Child target community. This article discusses data collection, preprocessing, and constraints such as network bandwidth and power availability prior to data transmission over a user datagram protocol (UDP)-based network. More »»

2011

Journal Article

N. A. Jacob, Pillai, V., Nair, S., ,, Harrell, D. T., Delhommer, R., Chen, B., Sanchez, I., Almstrum, V., and Dr. Sundararaman Gopalan, “Low-cost remote patient monitoring system based on reduced platform computer technology.”, Telemedicine journal and e-health : the official journal of the American Telemedicine Association, vol. 17, pp. 536-545, 2011.[Abstract]


Telemedicine is a well-accepted method providing healthcare benefits to people over long distances. However, in normal telemedicine practices, dedicated complex hardware and network backbones for data collection and communication make the system unintelligible to the common man. Centralization of telemedicine units also makes it accessible only to the immediate surrounding community. In an attempt to address these issues, a study aimed at developing a low-cost remote patient monitoring (RPM) system based on reduced platform computer technology has been carried out. The main focus of the work was to develop a real-time, universal serial bus plug-in module for a portable RPM system, specifically the XO Laptop. In addition, this system is also intended to serve as an educational tool especially for the One Laptop per Child target community. This article discusses data collection, preprocessing, and constraints such as network bandwidth and power availability prior to data transmission over a user datagram protocol (UDP)-based network. More »»

2004

Journal Article

J. J. Peterson, Young, C. D., Barnett, J., Dr. Sundararaman Gopalan, Gutt, J., Lee, C. - H., Li, H. - J., Hou, T. - H., Kim, Y., Lim, C., and , “Subnanometer scaling of HfO2/metal electrode gate stacks”, Electrochemical and solid-state letters, vol. 7, pp. G164–G167, 2004.[Abstract]


The equivalent oxide thickness (EOT) of high-k n-channel metal oxide semiconductor (NMOS) transistors was scaled using 3 methods, Formula reduction of the bottom interfacial layer (BIL) using Formula interface engineering, Formula thickness reduction of the Formula dielectric, and Formula use of metal gate electrodes to minimize top interfacial growth formation and polysilicon depletion. NMOS transistors fabricated using these methods demonstrate 0.72 nm EOT using the Formula BIL with scaled Formula /metal gates and 0.81 nm EOT using the Formula BIL with scaled Formula /metal gates. Charge pumping, mobility, and device performance results of these high-k NMOS transistors is discussed. © 2004 The Electrochemical Society. All rights reserved. More »»

2003

Journal Article

K. Onishi, Kang, C. Seok, Choi, R., Cho, H. - J., Dr. Sundararaman Gopalan, Nieh, R. E., Krishnan, S. A., and Lee, J. C., “Improvement of surface carrier mobility of HfO 2 MOSFETs by high-temperature forming gas annealing”, Electron Devices, IEEE Transactions on, vol. 50, pp. 384–390, 2003.

2003

Journal Article

M. Shahariar Akbar, Dr. Sundararaman Gopalan, Cho, H. - J., Onishi, K., Choi, R., Nieh, R., Kang, C. S., Kim, Y. H., Han, J., Krishnan, S., and , “High-performance TaN/HfSiON/Si metal-oxide-semiconductor structures prepared by NH3 post-deposition anneal”, Applied physics letters, vol. 82, pp. 1757–1759, 2003.

2002

Journal Article

H. - J. Cho, Kang, C. Seok, Onishi, K., Dr. Sundararaman Gopalan, Nieh, R., Choi, R., Krishnan, S., and Lee, J. C., “Structural and electrical properties of HfO 2 with top nitrogen incorporated layer”, Electron Device Letters, IEEE, vol. 23, pp. 249–251, 2002.

2002

Journal Article

Dr. Sundararaman Gopalan, Onishi, K., Nieh, R., Kang, C. S., Choi, R., Cho, H. - J., Krishnan, S., and Lee, J. C., “Electrical and physical characteristics of ultrathin hafnium silicate films with polycrystalline silicon and TaN gates”, Applied physics letters, vol. 80, pp. 4416–4418, 2002.

2002

Journal Article

C. S. Kang, Cho, H. - J., Onishi, K., Nieh, R., Choi, R., Dr. Sundararaman Gopalan, Krishnan, S., Han, J. H., and Lee, J. C., “Bonding states and electrical properties of ultrathin HfO$_x$N$_y$ gate dielectrics”, Applied Physics Letters, vol. 81, p. 2593, 2002.[Abstract]


Hafnium oxynitride (HfOxNy) gate dielectric was prepared using reactive sputtering followed by postdeposition annealing at 650 °C in a N2 ambient. Nitrogen incorporation in the dielectric was confirmed by x-ray photoelectron spectroscopy analysis. In comparison to HfO2 of the same physical thickness, HfOxNy gate dielectric showed lower equivalent oxide thickness (EOT) and lower leakage density (J). Even after a high-temperature postmetal anneal at 950 °C, an EOT of 9.6 Å with J of 0.8 mA/cm2 @-1.5 V was obtained. In contrast, J of ˜20 mA/cm2 @-1.5 V for HfO2 with an EOT of 10 Å was observed. The lower leakage current and superior thermal stability of HfOxNy can be attributed to the formation of silicon-nitrogen bonds at the gate dielectric/Si interface and strengthened immunity to oxygen diffusion by the incorporated nitrogen. More »»

2002

Journal Article

R. Nieh, Choi, R., Dr. Sundararaman Gopalan, Onishi, K., Kang, C. Seok, Cho, H. - J., Krishnan, S., and Lee, J. C., “Evaluation of silicon surface nitridation effects on ultra-thin ZrO2 gate dielectrics”, Applied physics letters, vol. 81, pp. 1663–1665, 2002.[Abstract]


The effects of silicon surface nitridation on metal–oxide–semiconductor capacitors with zirconium oxide (ZrO2)(ZrO2) gate dielectrics were investigated. Surface nitridation was introduced via ammonia (NH3)(NH3) annealing prior to ZrO2ZrO2 sputter-deposition, and tantalum nitride (TaN) was used for the gate electrode. It was found that capacitors with the nitridation had thinner equivalent oxide thickness (∼8.7 Å), comparable leakage current, and slightly increased capacitance–voltage hysteresis as compared to samples without nitridation. Additionally, transmission electron microscopy pictures revealed that nitrided samples had a thicker interfacial layer (IL), which had a higher dielectric constant than that of the non-nitrided IL. More »»

2002

Journal Article

Y. Hee Kim, Onishi, K., Kang, C. Seok, Cho, H. - J., Nieh, R., Dr. Sundararaman Gopalan, Choi, R., Han, J., Krishnan, S., and Lee, J. C., “Area dependence of TDDB characteristics for HfO2 gate dielectrics”, IEEE Electron Device Letters, vol. 23, pp. 594-596, 2002.[Abstract]


Weibull slopes, area scaling factors, and lifetime projection have been investigated for both soft breakdown and hard breakdown for the first time, in order to gain a better understanding of, the breakdown mechanism of HfO/sub 2/ gate dielectrics. The Weibull slope /spl beta/ of the hard breakdown for both the area dependence and the time-to-dielectric-breakdown distribution was found to be /spl beta/ = 2, whereas that of the soft breakdown was about 1.4. Estimated ten-year lifetime has been projected to be -2 V. More »»

2002

Journal Article

Dr. Sundararaman Gopalan, “Process development, material analysis, and electrical characterization of ultra thin hafnium silicate films for alternative gate dielectric application”, ProQuest Dissertations And Theses; Thesis (Ph.D.)--The University of Texas at Austin, vol. 64, no. 01, p. 0367;176 , 2002.[Abstract]


As aggressive scaling of the Metal-Oxide-Semiconductor (MOS) integrated circuit continues, the required equivalent oxide thickness (EOT) for 100nm technology and beyond is expected to be less than 12A. In this ultra-thin film regime, SiO2 or oxynitrides face serious limitations due to direct tunneling currents, dopant penetration, and reliability concerns. HfO 2, ZrO2 and their silicates are being considered as potential candidates for replacing conventional oxides or oxynitrides owing to their thermodynamic stability in contact with silicon, high dielectric constants, chemical stability at high temperatures, etc. Although HfO 2 has shown promising electrical characteristics such as low EOT and leakage, low crystallization temperature, poor interface quality, uncontrolled interfacial layer growth, and reliability issues are some of the concerns with it. HfSixOy has been sought as a solution to alleviate some of these problems. Hafnium silicate films were deposited by co-sputtering of hafnium and silicon in argon ambient followed by annealing. Hafnium silicates with more than 13% Si remains amorphous even after 1000°C anneals. They also show better thermal stability characteristics than HfO2 at all compositions studied. They have been shown to be compatible with poly and TaN gate electrodes. Through process optimization, Hf-silicate films have been scaled down to 10.3A, with leakage in the order of 1mA/cm2 at -1.5V. Low dispersion, low stress-induced leakage currents, high effective breakdown fields, and large lifetimes were obtained. Good thermal stability with polysilicon and TaN electrodes were also obtained. MOS transistors have been demonstrated with poly and TaN electrodes, showing excellent subthreshold and drive current characteristics. The effects of NH3 pre-treatment on the electrical and reliability characteristics were also investigated. While thermal stability, EOT, leakage and breakdown were improved significantly, threshold voltage shifts, high hysteresis, poor MOSFET and poor reliability characteristics were obtained for the NH 3 pre-treated samples. In conclusion, promising electrical and material characteristics were obtained for Hf-silicates indicating that they are attractive candidates for alternative gate dielectric applications. More »»

2000

Journal Article

Dr. Sundararaman Gopalan, Balu, V., Lee, J. - H., Hee-Han, J., and Lee, J. C., “Study of the electronic conduction mechanism in Nb-doped SrTiO3 thin films with Ir and Pt electrodes”, Applied Physics Letters, vol. 77, pp. 1526–1528, 2000.

2000

Journal Article

A. Lucas, Dr. Sundararaman Gopalan, Lee, J. C., Kaushal, S., Niino, R., and Tada, Y., “Ultrathin Gate Oxynitrides Grown Using Fast Ramp Vertical Furnace for Sub-130 Nanometer Technology”, Electrochemical and Solid-State Letters, vol. 3, pp. 389–391, 2000.

2000

Journal Article

L. Kang, Lee, B. Hun, Qi, W. - J., Jeon, Y., Nieh, R., Dr. Sundararaman Gopalan, Onishi, K., and Lee, J. C., “Electrical characteristics of highly reliable ultrathin hafnium oxide gate dielectric”, Electron Device Letters, IEEE, vol. 21, pp. 181–183, 2000.

1999

Journal Article

Dr. Sundararaman Gopalan, Wong, C. - H., Balu, V., Lee, J. - H., Han, J. H., Mohammedali, R., and Lee, J. C., “Effect of niobium doping on the microstructure and electrical properties of strontium titanate thin films for semiconductor memory application”, Applied physics letters, vol. 75, pp. 2123–2125, 1999.

1999

Journal Article

J. - H. Lee, Mohammedali, R., Han, J. H., Balu, V., Dr. Sundararaman Gopalan, Wong, C. - H., and Lee, J. C., “The niobium doping effects on resistance degradation of strontium titanate thin film capacitors”, Applied physics letters, vol. 75, pp. 1455–1457, 1999.[Abstract]


The rate of resistance degradation of thin (<450 Å) niobium-doped strontium titanate polycrystalline films with platinum top electrodes and iridium bottom electrodes was investigated as a function of direct current (dc) voltages, temperature, Nb atomic fractions [Sr(Ti1−xNbx)O3+y,[Sr(Ti1−xNbx)O3+y, x=0,x=0, 0.001, 0.01, and 0.05, respectively], and capacitor areas (from 2.50×10−52.50×10−5 to 2.91×10−3 cm2).2.91×10−3 cm2). It was found that by increasing the amount of niobium, the resistance degradation rates were greatly reduced, but the leakage currents increased. Also, the degradation rates seemed fairly independent of the areas of the devices. More »»

Publication Type: Conference Proceedings

Year of Publication Publication Type Title

2018

Conference Proceedings

F. Chidanand Robert and Dr. Sundararaman Gopalan, “Solar electricity: An effective asset to supply urban loads in hot climates”, International Conference on Electrical, Electronics, Material and Applied Science (ICEEMAS), vol. 1952. Telangana, India, 2018.[Abstract]


While human population has been multiplied by four in the last hundred years, the world energy consumption was multiplied by ten. The common method of using fossil fuels to provide energy and electricity has dangerously disturbed nature’s and climate’s balance. It has become urgent and crucial to find sustainable and eco-friendly alternatives to preserve a livable environment with unpolluted air and water. Renewable energy is the unique eco-friendly opportunity known today. The main challenge of using renewable energy is to ensure the constant balance of electricity demand and generation on the electrical grid. This paper investigates whether the solar electricity generation is correlated with the urban electricity consumption in hot climates. The solar generation and total consumption have been compared for three cities in Florida. The hourly solar generation has been found to be highly correlated with the consumption that occurs 6 h later, while the monthly solar generation is correlated with the monthly energy consumption. Producing 30% of the electricity using solar energy has been found to compensate partly for the monthly variation in the urban electricity demand. In addition, if 30% of the world electricity is produced using solar, global CO2 emissions would be reduced by 11.7% (14.6% for India). Thus, generating 30% solar electricity represents a valuable asset for urban areas situated in hot climates, reducing the need for electrical operating reserve, providing local supply with minimal transmission losses, but above all reducing the need for fossil fuel electricity and reducing global CO2 emission.

More »»

2017

Conference Proceedings

Dr. Sundararaman Gopalan, Dutta, S., Ramesh, S., Prathapan, R., and Sreehari, G., “Al203 thin films on Silicon and Germanium substrates for CMOS and flash memory applications”, AIP Conference Proceedings International Conference on Functional Materials, Characterization, Solid State Physics, Power, Thermal and Combustion Energy 2017, FCSPTC 2017,Andhra Pradesh, India, vol. 1859. American Institute of Physics Inc., 2017.[Abstract]


As scaling of device dimensions has continued, it has become necessary to replace traditional SiO2 with high dielectric constant materials in the conventional CMOS devices. In addition, use of metal gate electrodes and Germanium substrates may have to be used in order to address leakage and mobility issues. Al2O3 is one of the potential candidates both for CMOS and as a blocking dielectric for Flash memory applications owing to its low leakage. In this study, the effects of sputtering conditions and post-deposition annealing conditions on the electrical and reliability characteristics of MOS capacitors using Al2O3 films on Si and Ge substrates with Aluminium gate electrodes have been presented. It was observed that higher sputtering power resulted in larger flat-band voltage (Vfb) shifts, more hysteresis, higher interface state density (Dit) and a poorer reliability. Wit was also found that while a short duration high temperature annealing improves film characteristics, a long duration anneal even at 800C was found to be detrimental to MOS characteristics. Finally, the electronic conduction mechanism in Al2O3 films was also studied. It was observed that the conduction mechanism varied depending on the annealing condition, thickness of film and electric field. © 2017 Author(s).

More »»

1999

Conference Proceedings

Dr. Sundararaman Gopalan, Han, J. H., Balu, V., Lee, J. H., Mohemmedali, R., Wong, C. H., and Lee, J. C., “Effect of N2O on the RF-magnetron Sputtered SrTiO3 Films for ULSI DRAM Application”, Proceedings of the 11th International Symposium on Integrated Ferroelectrics. Colorado Springs, 1999.

Publication Type: Conference Paper

Year of Publication Publication Type Title

2018

Conference Paper

D. Anand, M, S., Dr. Sundararaman Gopalan, and A, P., “Accessing the performance of CMOS Amplifiers using High-k-Dielectric with Metal Gate on high mobility substrate”, in ICACDS 2018, Springer CCIS, 2018.

2018

Conference Paper

S. M, Anand, D., A, D. P., and Dr. Sundararaman Gopalan, “Comparison of High K Metal Gate Based CMOS Amplifiers performance with traditional Gate stack structures”, in ICEES 2018, 4th International Conference on Electrical Energy System , India, 2018.

2017

Conference Paper

V. Virajit Garbhapu and Dr. Sundararaman Gopalan, “IoT Based Low Cost Single Sensor Node Remote Health Monitoring System”, in 8th International Conference on Emerging Ubiquitous Systems and Pervasive Networks, EUSPN 2017 and the 7th International Conference on Current and Future Trends of Information and Communication Technologies in Healthcare, ICTH 2017, Lund; Sweden, 2017, vol. 113, pp. 408 - 415.[Abstract]


In developing countries, population increase is not sufficiently matched by increase in available health care resources. Inspite of technology advances, proper medical facility and resources are still not available to a large percentage of population, especially those having low income and living in rural or remote areas. There is an urgent need for development of a low cost and highly reliable technology for monitoring healthcare for those living in such areas that provides rapid monitoring of basic vital health parameters for large numbers of people, and making this data readily available to doctor present anywhere in the world. A novel and an efficient biomedical device has been designed which can quickly monitor the vital signs of large number of people simultaneously and transmit that information wirelessly to the doctor or medical facility present anywhere in the world. The instrument is represented by a hub and spoke model with the spokes being the sensor nodes consisting of a microcontroller MSP430G2553 and a wireless transceiver nRF24L01 (IEEE 802.15.4). The hub consists of a Raspberry Pi 3 with the same transceiver. The data received at the hub can be transmitted to the doctor through the inbuilt IEEE 802.11 (Wi-Fi protocol) of Raspberry Pi 3. All that the instrument needs to work is a Wi-Fi or an Ethernet connection and all the sensor nodes can be powered from the coin cell batteries.

More »»

2017

Conference Paper

F. C. Robert, Sisodia, G. S., and Dr. Sundararaman Gopalan, “An Intelligent Approach to Strengthening of the Rural Electrical Power Supply Using Renewable Energy Resources”, in 3rd International Conference on Green Energy Technology (ICGET), Rome, Italy, 2017.[Abstract]


The healthy growth of economy lies in the balance between rural and urban development. Several developing countries have achieved a successful growth of urban areas, yet rural infrastructure has been neglected until recently. The rural electrical grids are weak with heavy losses and low capacity. Renewable energy represents an efficient way to generate electricity locally. However, the renewable energy generation may be limited by the low grid capacity. The current solutions focus on grid reinforcement only. This article presents a model for improving renewable energy integration in rural grids with the intelligent combination of three strategies: 1) grid reinforcement, 2) use of storage and 3) renewable energy curtailments. Such approach provides a solution to integrate a maximum of renewable energy generation on low capacity grids while minimising project cost and increasing the percentage of utilisation of assets. The test cases show that a grid connection agreement and a main inverter sized at 60 kW (resp. 80 kW) can accommodate a 100 kWp solar park (resp. 100 kW wind turbine) with minimal storage.

More »»

2017

Conference Paper

F. C. Robert, Sisodia, G. S., and Dr. Sundararaman Gopalan, “The critical role of anchor customers in rural microgrids, Impact of load factor on energy cost”, in 2017 International Conference on Computation of Power, Energy Information and Commuincation (ICCPEIC), Chennai, India, 2017.[Abstract]


The development of the society was supported by an easy access to energy and in particular to electricity. However, 1.2 billion people worldwide are yet to receive an electrical connection. Most of them live in rural areas and many are far from the grid or in hilly terrains. Renewable energy microgrids are a good alternative to grid extension in many cases. However, the rural communities often consist of households only, with an energy demand concentrated in the morning and at night, in the early hours. This increases the need for costly storage as renewable energy is either available during the day for solar, or distributed throughout the day for wind. Anchor customers are users such as schools, hospitals, small manufacturing units or GSM tower that consume energy throughout the day. They contribute to the local development and can be a source of steady income for the microgrid. This paper illustrates that by including such customers at the microgrid design stage, the average cost of energy can be reduced. Through microgrid design simulations, it is shown that when anchor customers represent around 30% of the load (load factor of 0.4), the cost of energy can be reduced by 22% for a microgrid powered by wind and solar energy and by 48% for a solar microgrid, compared to a village with less than 10% of anchor users (load factor 0.2). It is thus critical to include anchor customers at the microgrid design stage in order to provide affordable energy in rural areas.

More »»

2017

Conference Paper

F. C. Robert, Sisodia, G. S., and Dr. Sundararaman Gopalan, “Environmental Friendly and Cost Effective Approach to Provide Highly Reliable Electric Supply to Rural Business and Industries”, in International Conference on Technological Advancement on Power and Energy (TAP Energy), Amritapuri, India, 2017.

2017

Conference Paper

F. C. Robert, Sisodia, G. S., and Dr. Sundararaman Gopalan, “Indicators for the Usability of Solar Energy in India for the Development of Islanded Microgrids”, in International Conference on Technological Advancement on Power and Energy (TAP Energy), Amritapuri, India, 2017.

2005

Conference Paper

J. Gutt, Dr. Sundararaman Gopalan, Brown, G. A., Kirsch, P. D., Peterson, J. J., Gardner, M. I., Li, H. - J., Lysaght, P., Alshareef, H. N., Choi, K., and , “ALD of advanced high-k and metal gate stacks for MOS devices”, in Proceedings-Electrochemical Society, 2005, vol. PV 2005-05, pp. 282-292.

2004

Conference Paper

G. Bersuker, Gutt, J., Chaudhary, N., Moumen, N., Lee, B. H., Barnett, J., Dr. Sundararaman Gopalan, Brown, G., Kim, Y., Young, C. D., and , “Integration issues of high-k gate stack: Process-induced charging”, in Reliability Physics Symposium Proceedings, 2004. 42nd Annual. 2004 IEEE International, 2004.[Abstract]


Electrical properties of a wide range of Hf-based gate stacks were investigated using several modifications of a standard planar CMOS process flow to address the effects of transistor processing on the electrical properties of the high-k dielectrics. Characteristics of the short channel transistors were shown to be very sensitive to the fabrication process specifics - process sequence, tools, and recipes. It was concluded that, contrary to SiO2, the high-k films could be contaminated with reactive species during the post-gate definition fabrication steps, resulting in the formation of local charge centers. Such process-induced charging (PIC) degrades transistor performance and complicates evaluation of the intrinsic properties of high-k dielectrics. A process scheme that minimizes PIC is discussed. More »»

2004

Conference Paper

B. H. Lee, Young, C. D., Choi, R., Sim, J. H., Bersuker, G., Kang, C. Y., Harris, R., Brown, G. A., Matthews, K., Song, S. C., Moumen, N., Barnett, J., Lysaght, P., Choi, K. S., Wen, H. C., Huffman, C., Alshareef, H., Majhi, P., Dr. Sundararaman Gopalan, Peterson, J., Kirsh, P., Li, H. J., Gutt, J., Gardner, M., Huff, H. R., Zeitzoff, P., Murto, R. W., Larson, L., and Ramiller, C., “Intrinsic characteristics of high-k devices and implications of fast transient charging effects (FTCE)”, in IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004., 2004.[Abstract]


Fast transient charging effects (FTCE) are found to be the source of various undesirable characteristics of high-k devices, such as Vth instability, low DC mobility and poor reliability. The intrinsic characteristics of high-k transistors free from FTCE are demonstrated using ultra-short pulsed I-V measurements, and it is found that the intrinsic mobility of high-k devices can be much higher than what has been observed in DC based measurements. The FTCE model suggests that many of DC characterization methods developed for SiO2 devices are not sufficiently adequate for high-k devices that exhibit significant transient charging. The existence of very strong concurrent transient charging during various reliability tests also degrades the validity of test results. Finally, the implication of FTCE on the high-k implementation strategy is discussed. More »»

2004

Conference Paper

J. Barnett, Moumen, N., Gutt, J., Gardner, M., Huffman, C., Majhi, P., Peterson, J. J., Dr. Sundararaman Gopalan, Foran, B., Li, H. J., and , “Experimental study of etched back thermal oxide for optimization of the Si/high-k interface”, in 2004 Spring Meeting of the Material Research Society, 2004.[Abstract]


We have demonstrated a uniform, robust interface for high-k deposition with significant improvements in device electrical performance compared to conventional surface preparation techniques. The interface was a thin thermal oxide that was grown and then etched back in a controlled manner to the desired thickness. Utilizing this approach, an equivalent oxide thickness (EOT) as low as 0.87 nm has been demonstrated on high-k gate stacks having improved electrical characteristics as compared to more conventionally prepared starting surfaces. More »»

2004

Conference Paper

C. D. Young, Kerber, A., Hou, T. H., Cartier, E., Brown, G. A., Bersuker, G., Kim, Y., Lim, C., Gutt, J., Lysaght, P., and Dr. Sundararaman Gopalan, “Charge trapping and electron mobility degradation in MOCVD hafnium silicate gate dielectric stack structures”, 2004.

2003

Conference Paper

M. I. Gardner, Dr. Sundararaman Gopalan, Gutt, J., Peterson, J., Li, H. - J., and Huff, H. R., “EOT scaling and device issues for high-k gate dielectrics”, in Gate Insulator, 2003. IWGI 2003. Extended Abstracts of International Workshop on, 2003.

2003

Conference Paper

C. D. Young, Kerber, A., Hou, T. H., Cartier, E., Brown, G. A., Bersuker, G., Kim, Y., Lim, C., Gutt, J., Lysaght, P., Dr. Sundararaman Gopalan, and , “Charge trapping and mobility degradation in MOCVD hafnium silicate gate dielectric stack structures”, 2003.

2002

Conference Paper

R. Choi, Onishi, K., Kang, C. Seok, Dr. Sundararaman Gopalan, Nieh, R., Kim, Y. H., Han, J. H., Krishnan, S., Cho, H. - J., Shahriar, A., and , “Fabrication of high quality ultra-thin HfO/sub 2/gate dielectric MOSFETs using deuterium anneal”, in Electron Devices Meeting, 2002. IEDM'02. International, 2002.

2002

Conference Paper

K. Onishi, Kang, C. Seok, Choi, R., Cho, H. - J., Dr. Sundararaman Gopalan, Nieh, R., Krishnan, S., and Lee, J. C., “Effects of high-temperature forming gas anneal on HfO/sub 2/MOSFET performance”, in VLSI Technology, 2002. Digest of Technical Papers. 2002 Symposium on, 2002.

2002

Conference Paper

R. Nieh, Krishnan, S., Cho, H. - J., Kang, C. Seok, Dr. Sundararaman Gopalan, Onishi, K., Choi, R., and Lee, J. C., “Comparison between ultra-thin ZrO/sub 2/ and ZrO/sub x/N/sub y/ gate dielectrics in TaN or poly-gated NMOSCAP and NMOSFET devices”, in 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303), 2002.[Abstract]


Both NMOSCAP and self-aligned NMOSFET devices using TaN gates were fabricated and characterized in order to compare ZrO/sub 2/ and nitrogen-incorporated ZrO/sub 2/ (ZrO/sub x/N/sub y/) gate dielectrics (EOT/spl sim/10.3/spl Aring/). ZrO/sub x/N/sub y/ devices demonstrated excellent thermal stability, comparable leakage current, higher breakdown field, decreased subthreshold swing, and improved drive current over ZrO/sub x/ devices. Polysilicon-gated NMOSCAPs were also fabricated to investigate the compatibility of ZrO/sub x/N/sub y/ with the poly process (EOT/spl sim/19/spl Aring/), but high leakage and TEM analysis revealed interaction between the poly and ZrO/sub x/N/sub y/. More »»

2002

Conference Paper

K. Onishi, Kang, C. Seok, Choi, R., Cho, H. - J., Dr. Sundararaman Gopalan, Nieh, R., Krishnan, S., and Lee, J. C., “Charging effects on reliability of HfO2 devices with polysilicon gate electrode”, in 2002 IEEE International Reliability Physics Symposium. Proceedings. 40th Annual (Cat. No.02CH37320), 2002.[Abstract]


Time dependent dielectric breakdown and bias temperature instability of HfO2 devices with polysilicon gate electrodes are studied. Both N and PMOS capacitors have sufficient TDDB lifetime, whereas PMOS capacitors show gradual increase in the leakage current during stress. HfO2 PMOSFET's without nitridation have sufficient immunity against negative bias temperature instability. Bias temperature instability for NMOS can be a potential scaling limit for HfO2. More »»

2002

Conference Paper

Dr. Sundararaman Gopalan, Choi, R., Onishi, K., Nieh, R., Kang, C. S., Cho, H. J., Krishnan, S., and Lee, J. C., “Impact of NH/sub 3/ pre-treatment on the electrical and reliability characteristics of ultra thin hafnium silicate films prepared by re-oxidation method”, in 60th DRC. Conference Digest Device Research Conference, 2002.[Abstract]


The trade-offs between the benefits of NH/sub 3/ pre-treatment such as improved scalability, lower leakage and higher breakdown fields, and potential issues such as large hysteresis, degraded MOSFET characteristics and poorer reliability on Hf-silicate devices have been studied. More »»

2002

Conference Paper

R. Choi, Onishi, K., Kang, C. Scok, Nieh, R., Dr. Sundararaman Gopalan, Cho, H. - J., Krishnan, S., and Lee, J. C., “High quality MOSFETs fabrication with HfO/sub 2/ gate dielectric and tan gate electrode”, in 60th DRC. Conference Digest Device Research Conference, 2002.[Abstract]


MOSFETs with high gate dielectric such as HfOz, ZrOz and LazOl have been studied intensively. Among these materials, HfOz seems to be promising because of its compatibility with the polysilicon gate process and relatively superior scalability. More »»

2001

Conference Paper

Dr. Sundararaman Gopalan, Dharmarajan, E., Nieh, R., Onishi, K., Kang, C. S., Choi, R., Cho, H., and Lee, J. C., “Ultrathin Hafnium Silicate Films with TaN and Polysilicon Gate Electrodes for Gate Dielectric Application”, in 32nd IEEE Semiconductor Interface Specialist Conference, Washington DC, 2001.

2001

Conference Paper

R. Choi, Kang, C. Seok, Lee, B. Hun, Onishi, K., Nieh, R., Dr. Sundararaman Gopalan, Dharmarajan, E., and Lee, J. C., “High-quality ultra-thin HfO/sub 2/ gate dielectric MOSFETs with TaN electrode and nitridation surface preparation”, in 2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184), 2001.[Abstract]


A surface preparation technique using an NH/sub 3/ anneal has been investigated to reduce interface reaction and consequently the equivalent oxide thickness (EOT) of hafnium oxide for alternative gate dielectric applications. MOSCAPs and MOSFETs were fabricated on the NH/sub 3/ nitrided substrates with HfO/sub 2/ dielectric and TaN gate electrode. Using this nitridation technique, EOT of as thin as 7.1 /spl Aring/ with 10/sup -2/ A/cm/sup 2/ at -1.5 V was obtained. Furthermore, excellent device characteristics and reasonable reliability have been achieved. More »»

2001

Conference Paper

K. Onishi, Kang, L., Choi, R., Dharmarajan, E., Dr. Sundararaman Gopalan, Jeon, Y., Kang, C. Seok, Lee, B. Hun, Nieh, R., and Lee, J. C., “Dopant Penetration Effects on Polysilicon Gate HfO\~ 2 MOSFET's”, in Symposium on VLSI Technology, 2001.[Abstract]


Effect of dopant penetration on electrical characteristics of polysilicon gate HfOz gate dielectric MOSFET’s has been studied quantitatively, for the first time. Significant boron penetration was observed at high temperature dopant activation, which degrades not only flatband voltage (V,) but channel carrier mobility. Surface nitridation prior to Hf02 deposition can suppress boron penetration along with equivalent oxide thickness (EOT) reduction. More »»

2001

Conference Paper

K. Onishi, Kang, C. Seok, Choi, R., Cho, H. - J., Dr. Sundararaman Gopalan, Nieh, R., Dharmarajan, E., and Lee, J. C., “Reliability characteristics, including NBTI, of polysilicon gate HfO/sub 2/ MOSFET's”, in International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224), 2001.[Abstract]


The performance of polysilicon gate HfO/sub 2/ MOSFET's is discussed in terms of gate leakage current and the effects of NH/sub 3/ surface nitridation on boron penetration and carrier mobility. Negative bias temperature instability (NBTI) on HfO/sub 2/ PMOSFET's was evaluated for the first time. Although surface nitridation enhanced NBTI degradation, HfO/sub 2/ PMOSFET's without nitridation show sufficient NBTI immunity. More »»

2001

Conference Paper

H. J. Cho, Kang, C. S., Onishi, K., Dr. Sundararaman Gopalan, Nieh, R., Choi, R., Dharmarajan, E., and Lee, J. C., “Novel nitrogen profile engineering for improved TaN/HfO/sub 2//Si MOSFET performance”, in International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224), 2001.[Abstract]


A novel technique to tailor the nitrogen profile in HfO/sub 2/ gate dielectric has been developed. Nitrogen was incorporated in the upper layer of HfO/sub 2/ using a reactive sputtering method, followed by a reoxidation anneal. The resulting dielectrics showed good thermal stability, boron penetration suppression, low interfacial trap density, plus lower hysteresis and improved MOSFET characteristics, in comparison to both non-nitrided and bottom nitrided (via Si-surface nitridation with NH/sub 3/) devices. More »»

2001

Conference Paper

R. Nieh, Onishi, K., Choi, R., Cho, H. - J., Kang, C. Seok, Dr. Sundararaman Gopalan, Krishna, S., and Lee, J. C., “Performance effects of two nitrogen incorporation techniques on TaN/HfO2 and poly/HfO2 MOSCAP and MOSFET devices”, in Extended Abstracts of International Workshop on Gate Insulator. IWGI 2001 (IEEE Cat. No.01EX537), 2001.[Abstract]


In the coming MOS generations, scaling trends will force the replacement of SiO/sub 2/ as the gate dielectric. Due to constraints - primarily high gate leakage current - SiO/sub 2/ will likely be replaced by a high dielectric constant or high-k material. This paper will attempt to address some of the high-k material concerns by presenting promising results on HfO/sub 2/ stack structures with two forms of nitrogen incorporation - surface nitridation and top nitridation. More »»

2001

Conference Paper

R. Nieh, Onishi, K., Choi, R., Dharmarajan, E., Dr. Sundararaman Gopalan, Kang, C. S., and Lee, J. C., “HIGH-K GATE DIELECTRICS: Hf02, ZK> 2, AND THEIR SILICATES”, in Rapid Thermal and Other Short-time Processing Technologies II: Proceedings of the International Symposium, 2001.

2000

Conference Paper

B. Hun Lee, Choi, R., Kang, L., Dr. Sundararaman Gopalan, Nieh, R., Onishi, K., Jeon, Y., Qi, W. - J., Kang, C., and Lee, J. C., “Characteristics of TaN gate MOSFET with ultrathin hafnium oxide (8/spl Aring/-12/spl Aring/)”, in Electron Devices Meeting, 2000. IEDM'00. Technical Digest. International, 2000.

2000

Conference Paper

L. Kang, Onishi, K., Jeon, Y., Lee, B. Hun, Kang, C., Qi, W. - J., Nieh, R., Dr. Sundararaman Gopalan, Choi, R., and Lee, J. C., “MOSFET devices with polysilicon on single-layer HfO/sub 2/ high-K dielectrics”, in International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138), 2000.[Abstract]


MOSFETs and MOSCAPs of a single-layer thin HfO/sub 2/ gate dielectric with dual polysilicon gate were fabricated with self-aligned process and characterized. Polysilicon and dopant activation processes were optimized such that leakage current and equivalent oxide thickness (EOT) of HfO/sub 2/ remain low (EOT of 12.0 /spl Aring/. HfO/sub 2/ with 1/spl times/10/sup -3/ A/cm/sup 2/ at Vg=1.0 V). Reasonable N- and P-MOSFET characteristics such as subthreshold swing of 74 mV/decade and output currents were also demonstrated. More »»

2000

Conference Paper

L. Kang, Jeon, Y., Onishi, K., Lee, B. Hun, Qi, W. - J., Nieh, R., Dr. Sundararaman Gopalan, and Lee, J. C., “Single-Layer Thin HfO\~ 2 Gate Dielectric with n+-Polysilicon Gate”, in SYMPOSIUM ON VLSI TECHNOLOGY, 2000.[Abstract]


MOSCAPs and MOSFETs of a single-layer thin HfO2 gate dielectric with n+ polysilicon gate were fabricated and characterized. Polysilicon process was optimized such that leakage current and equivalent oxide thickness of HfOz remained low. Excellent C-V properties (e.g. low Dit and frequency dispersion) and reliability characteristics were obtained. Reasonable MOSFET quality was also demonstrated. More »»

2000

Conference Paper

W. - J. Qi, Nieh, R., Onishi, R., Lee, B. Hun, Kang, L., Jeon, Y., Dr. Sundararaman Gopalan, and Lee, J. C., “Temperature effect on the reliability of ZrO2 gate dielectric deposited directly on silicon”, in 2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059), 2000.[Abstract]


Temperature effect on the reliability of ZrO2 gate dielectric has been presented. High effective voltage-ramp breakdown field was observed. The activation energy of temperature accelerated voltage-ramp breakdown calculated from Arrhenius plot indicates that the breakdown of ZrO2 is less sensitive to temperature than a thermal oxide of similar electrical thickness. ZrO2 films exhibit excellent TDDB characteristics with low charge trapping and no stress induced leakage current. The field and temperature acceleration for TDDB for the 15.8 Å capacitance equivalent oxide thickness (CET) ZrO2 shows that the activation energy for TDDB falls into the range reported for oxide from 39 Å to 150 Å. It was found that the extrapolated 10-year lifetime operating voltage can be as high as -1.9 V, even at 150°C based on the “log(tBD) vs E” extrapolation model for a film with a CET of 15.8 Å More »»

2000

Conference Paper

R. Nieh, Qi, W. - J., Lee, B. Hun, Kang, L., Jeon, Y., Onishi, K., Dr. Sundararaman Gopalan, Kang, C. Seok, Dharmarajan, E., Choi, R., and , “PROCESSING EFFECTS AND ELECTRICAL EVALUATION OF Z1O2 FORMED BY RTP OXIDATION OF Zr”, in Low and High Dielectric Constant Materials: Materials Science, Processing, and Reliability Issues: Proceedings of the Fifth International Symposium, 2000.

1999

Conference Paper

L. Kang, Lee, B. - H., Qi, W. - J., Jeon, Y. - J., Nieh, R., Dr. Sundararaman Gopalan, Onishi, K., and Lee, J. C., “Highly reliable thin hafnium oxide gate dielectric”, in MRS Proceedings, 1999.[Abstract]


HfO2 is the one of the potential high-k dielectrics for replacing SiO2 as a gate dielectric. HfO2 is thermodynamically stable when in direct contact with Si and has a reasonable band gap (∼5.65eV). In this study, MOS capacitors (Pt/HfO2/Si) were fabricated by depositing HfO2 using reactive DC magnetron sputtering in the range of 33∼135Å followed by Pt deposition. During the HfO2 deposition, O2 flow was modulated to control interface quality and to suppress interfacial layer growing. By optimizing the HfO2 deposition process, equivalent oxide thickness (EOT) can be reduced down to ∼11.2 Å with the leakage current as low as 1X10−2 A/cm2 at +1.0V and negligible frequency dispersion. HfO2 films also show excellent breakdown characteristics and negligible hysteresis after high temperature annealing. From the high resolution TEM, there is a thin interfacial layer after annealing, suggesting a composite of Si-Hf-O with a dielectric constant of ≈ 2 X K SiO2. More »»

1998

Conference Paper

H. - J. Cho, Kang, C. S., Onishi, K., Dr. Sundararaman Gopalan, Nieh, R., Choi, R., Dharmarajan, E., and Lee, J. C., “Novel Nitrogen Profile Engineering for Improved TaN/HfO\~ 2/Si MOSFET Performance”, in International Electron Devices Meeting, 1998.

1998

Conference Paper

K. Onishi, Kang, C. Seok, Choi, R., Cho, H. - J., Dr. Sundararaman Gopalan, Nieh, R., Dharmarajan, E., and Lee, J. C., “Reliability Characteristics, Including NBTI, of Polysilicon Gate HfO\~ 2 MOSFET's”, in INTERNATIONAL ELECTRON DEVICES MEETING, 1998.

1998

Conference Paper

J. - H. Lee, Chen, T. - S., Balu, V., Han, J., Mohammedali, R., Dr. Sundararaman Gopalan, Wong, C. - H., and Lee, J. C., “Study of Rf-Sputtered Ba (Zr x Ti 1- x) O 3 Thin Films for Ulsi Dram Application”, in MRS Proceedings, 1998.[Abstract]


Barium zirconate-titanate (Ba(ZrxTi1−x)O3, BZT) films with thickness around 60 nm were deposited on Ir substrates using RF magnetron sputtering. The effect of zirconium atomic fraction (x = 0.14 to 0.7), substrate temperature (380 °C to 550 °C) and oxygen partial pressure (0 to 5 mTorr with total pressure 30 mTorr) on leakage current, dielectric constant and dielectric dispersion (capacitance reduction with increasing frequency) was studied. We found that the Zr/Ti ratio played a crucial role in determining the dielectric constant and dispersion. The dielectric constant varies from 26 to 168 while dispersion ranges from 0.80 to 2.58 % loss in capacitance (dielectric constant) per decade of frequency. Low leakage currents (< 1× 10−7 A/cm2) were observed. More »»

207
PROGRAMS
OFFERED
5
AMRITA
CAMPUSES
15
CONSTITUENT
SCHOOLS
A
GRADE BY
NAAC, MHRD
8th
RANK(INDIA):
NIRF 2018
150+
INTERNATIONAL
PARTNERS