Year : 2026
8-Bit RISC-V for ALU Operation
Cite this Research Publication : S. Hari Venkatesh, N. Vignesh, B. P. Pranav, P. Narun Ram, G. Saisuriyaa, 8-Bit RISC-V for ALU Operation, Lecture Notes in Electrical Engineering, Springer Nature Singapore, 2026, https://doi.org/10.1007/978-981-96-9554-6_34
Publisher : Springer Nature Singapore
Year : 2025
Design and Optimization of a Priority-Based Weighted Round Robin Arbiter with Enhanced Aging and Skip-Ahead Mechanism
Cite this Research Publication : Thomas Jefferson R, Devamithra Bimal, Saya Sai Kowshalya, Saisuriyaa G, V. Velumani, Design and Optimization of a Priority-Based Weighted Round Robin Arbiter with Enhanced Aging and Skip-Ahead Mechanism, 2025 International Conference on Intelligent Innovations in Engineering and Technology (ICIIET), IEEE, 2025, https://doi.org/10.1109/iciiet65921.2025.11378169
Publisher : IEEE
Year : 2025
A Reconfigurable 16KB Cache Architecture for Direct-Mapped and Set-Associative Designs
Cite this Research Publication : V Siva Durga Sankar, M Dheeraj Kumar Reddy, Unais I, S Lingeswar, Saisuriyaa G, A Reconfigurable 16KB Cache Architecture for Direct-Mapped and Set-Associative Designs, 2025 International Conference on Intelligent Innovations in Engineering and Technology (ICIIET), IEEE, 2025, https://doi.org/10.1109/iciiet65921.2025.11378244
Publisher : IEEE